The present invention is directed to an improvement in the characteristics of a phase-locked loop oscillator circuit.
A typical phase-locked loop oscillator circuit includes a voltage controlled oscillator, a phase detector, and a loop filter. The voltage controlled oscillator provides an output signal having a frequency that is precisely controlled by referencing its phase to that of a reference frequency. The phase detector detects the phase error between a signal derived from the voltage controlled oscillator frequency and a signal derived from the reference frequency. The output of the phase detector is applied to the input of the loop filter, whose characteristics determine the characteristics of the phase-locked loop. The output of the loop filter is applied to a frequency modulation input of the voltage controlled oscillator. This closes a feedback loop which causes the voltage controlled oscillator frequency to track the reference frequency. When the phase of the signal derived from the voltage controlled oscillator frequency is tracking the phase of the signal derived from the reference frequency, it is said that the loop is in lock.
Before the loop comes into lock, the two signals applied to the phase detector are not the same frequency. Since the phase difference between them is constantly changing. The phase difference repeats itself once for every 360.degree. of phase change, hence the output of the phase detector becomes an a-c waveform which oscillates once for every 360.degree. of phase change. Some phase detector types in use will produce a d-c component of the proper polarity at its output when the loop is out of lock, but the output still has a-c components in addition. Any a-c components at the output which are not completely suppressed by the loop filter will frequency modulate the voltage controlled oscillator. In many applications this extraneous modulation is undesirable and hence an out of lock condition is detrimental to the operation of the system of which the phase-locked loop is a part. The design of the loop filter is usually a compromise from among many different desirable characteristics of a phase-locked loop. A loop filter design which will suppress all a-c voltages from the phase detector output is often to slow in responding to frequency variations between the two signals. Also a loop filter which provides fast lock-up characteristics, without the present invention, often cannot suppress all a-c voltages from the output of the phase detector.
When the voltage controlled oscillator arrives at the correct lock-up frequency, the frequency of the two signals applied to the phase detector will become identical. However, the phase error between them at that moment could be any value. Hence the phase-locked loop will momentarily shift the frequency of the voltage controlled oscillator to bring the phase error to zero, thereby producing additional extraneous modulation when lock-up is reached.